Govt Exams Mock Test FREE | Online Quiz Competition

Q1. A J-K flip-flop is in a "no change" condition when_________.

J=0, K=0

J=0, K=1

J=1, K=0

J=1, K=1

Q2. For which of the following gate, the output will be one if all inputs are one

EX-OR gate

AND gate

NAND gate

NOT gate

Q3. In which ADC , the control logic initially sets MSB to 1 in the output register while starting the conversion process?

Counter type

Successive approximation

Dual slope type

Flash type

Q4. What is the quantising error of a 10-bit A/D converter?

0.10%

0.20%

0.40%

0.80%

Q5. A 12-bit A/D converter has the input voltage signal from 0V to +10V. The voltage equivalent to LSB will be

0

1.2mV

2.4mV

0.833V

Q6. The simplified for of logical expression \( A \bar E + \bar A \bar E + \bar A E + AE\) is

1

A

AB

None of these

Q7. Signed numbers should be represented by

2's complement form with extra sign bit

2's Complement form without extra sign bit

1's Complement form with extra sign bit

1's Complement form without extra sign bit

Q8. An index register in digital computer is to be used for

Address modification purpose

Performing arithmetic and logic operation

Counting number of times a program is executed

Temporary storage of result

Q9. The minimization of logic expression is done due to

Reduce space

Reduce the number of gates

Reduce cost

All of these

Q10. The complete set of only those logic gates designated as universal gate is

NOT, OR and AND gates

XNOR, NOR and NAND gates

NOR and NAND gates

XOR, NOR and NAND gates

Quiz

Year 2024

September
Week # 3 Quiz 5

Q1. A J-K flip-flop is in a "no change" condition when_________.

Q2. For which of the following gate, the output will be one if all inputs are one

Q3. In which ADC , the control logic initially sets MSB to 1 in the output register while starting the conversion process?

Q4. What is the quantising error of a 10-bit A/D converter?

Q5. A 12-bit A/D converter has the input voltage signal from 0V to +10V. The voltage equivalent to LSB will be

Q6. The simplified for of logical expression \( A \bar E + \bar A \bar E + \bar A E + AE\) is

Q7. Signed numbers should be represented by

Q8. An index register in digital computer is to be used for

Q9. The minimization of logic expression is done due to

Q10. The complete set of only those logic gates designated as universal gate is

Quiz

Year 2024

November Week # 4 Expire on 21 Dec 2024

December Week # 1 Expire on 31 Dec 2024

December Week # 2 Expire on 07 Jan 2025

December Week # 3 Expire on 14 Jan 2025

September Week # 3 Quiz 5

Q1. A J-K flip-flop is in a "no change" condition when_________.

Q2. For which of the following gate, the output will be one if all inputs are one

Q3. In which ADC , the control logic initially sets MSB to 1 in the output register while starting the conversion process?

Q4. What is the quantising error of a 10-bit A/D converter?

Q5. A 12-bit A/D converter has the input voltage signal from 0V to +10V. The voltage equivalent to LSB will be

Q6. The simplified for of logical expression \( A \bar E + \bar A \bar E + \bar A E + AE\) is

Q7. Signed numbers should be represented by

Q8. An index register in digital computer is to be used for

Q9. The minimization of logic expression is done due to

Q10. The complete set of only those logic gates designated as universal gate is

Record & Track Your Performance

September
Week # 3 Quiz 5