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Year 2024
April
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FAQs
April
Week # 3 Quiz 5
Q1.
What will be Excess - 3 code for decimal ( 376 )?
(0111 0100 1000)
(1000 1011 0111)
(1011 0111 1000)
(0110 1010 1001)
Q2.
The asynchronous Mealy machine consists of
An input decoder and an output decoder
An input decoder, memory elements and an output decoder
Memory elements and an output decoder
An input decoder and memory elements
Q3.
The address bus with a ROM of size \(4096 \times 8\: bits\) is
8 bits
10 bits
12 bits
16 bits
Q4.
To count from 0 to 1024, how many numbers of flip flops are required?
9
10
11
12
Q5.
The output of a JK flip-flop with asynchronous preset and clear input is '1'. The output can be changed to '0' with one of the following conditions.
By applying J=0, K=0 and using a clock
By applying J=1, K=0 and using a clock
By applying J=1, K=1 and using a clock
By applying asynchronous preset input
Q6.
A multiplier circuit consists of
AND gate and Full adders
OR gate and EX-OR gates
NAND
None of these
Q7.
The initial output of SR flip-flop Q is 0. It changes to 1, when a clock pulse is applied. The input S and R will be
S=1, R=1
S=0, R=0
S=0, R=1
S=1, R=0
Q8.
De Morgan’s first theorem shows the equivalence of
OR gate and Exclusive OR gate.
NOR gate and Bubbled AND gate.
NOR gate and NAND gate.
NAND gate and NOT gate
Q9.
The SOP form of logical expression is most suitable for designing logic circuits using only
OR gates
NOR gates
XOR gates
NAND gates
Q10.
The number of comparisons carried out in a 4 bit flash-type A/D convertor is
16
15
4
3
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